Groq delivers fast, efficient AI inference. Our LPU-based system powers GroqCloud™, giving businesses and developers the speed and scale they need. From our Bay Area roots to our growing global presence, we are on a mission to make high performance AI compute more accessible and affordable. When real-time AI is within reach, anything is possible. Build fast.

At Groq. We believe in an AI economy powered by human agency. We envision a world where AI is accessible to all, a world that demands processing power that is better, faster, and more affordable than is available today. AI applications are currently constrained by the limitations of the Graphics Processing Unit (GPU), a technology originally developed for the gaming market and soon to become the weakest link in the AI economy.

Enter Groq's LPU™ Inference Engine. Specifically engineered for the demands of large language models (LLMs), the Language Processing Unit outpaces the GPU in speed, power, efficiency, and cost-effectiveness. The quickest way to understand the opportunity is to watch the following talk – groq.link/scspdemo.

Why join Groq? AI will change humanity forever, and we believe preservation of human agency and self determination is only possible if AI is made affordably and universally accessible. Groq’s LPUs will power AI from an early stage, and you will get to leave your fingerprint on civilization.

Mission: Senior Staff Hardware Infrastructure/Methodology Engineer

We are seeking an experienced engineer to drive the next-generation infrastructure, methodology, and automation that will accelerate our ASIC design cycle. In this role, you will establish best-in-class flows, apply advanced AI/ML techniques to complex design and sign-off challenges, and develop robust tooling that reduces time-to-tapeout while enhancing quality of results (QoR).

Responsibilities & outcomes:

Own ASIC methodology end-to-end: Define and evolve Architectural Modeling → RTL → Design Verification → gates → P&R → sign-off flows.
Lead AI-driven methodology across the full ASIC lifecycle: Define the strategy, roadmap, and guardrails for applying AI/ML from architectural investigation through post-silicon, with measurable positive impacts on schedule, cost, and QoR.
Automate for speed and reproducibility: Build robust pipelines for build/test/run, artifact tracking, and results triage; make one-click “from RTL to sign-off” flows standard.
Scale compute and data: Design farm orchestration for thousands of concurrent jobs, manage license usage, cache, and distributed storage for large design datasets.
Make results visible: Create dashboards and alerts for QoR trends, regressions, and SLA adherence; enable data-driven design decisions.
Partner across teams: Collaborate with RTL, DV, PD, DFT, verification, and CAD to land new methods, support tapeout, and drive continuous improvement.
Collaborate with software engineering to elevate hardware methodology: Partner with platform, SRE, and tooling teams to apply software best practices for robust, scalable, and developer-friendly ASIC design workflows.

Ideal candidates have/are:

Minimum qualifications

7+ years building and maintaining ASIC flows in production (from RTL through sign-off) with proven tapeout experience.
Deep knowledge of at least two EDA domains: simulation, hardware emulation, logic synthesis, P&R, STA, formal/equiv, CDC/RDC, DFT/ATPG, physical verification, or power sign-off.
Strong coding skills in Python and one of Tcl/C++; rigorous software practices (version control, code review, testing).
Experience building CI/CD style automation for hardware (e.g., Jenkins/GitHub Actions, BuildKite, Bazel, containers).
Comfortable with Linux at scale and job schedulers (e.g., LSF/Slurm/Kubernetes).
Ability to translate engineer pain points into reliable tools with excellent UX and documentation.

Preferred qualifications

Hands-on experience with Synopsys (VCS/Verdi), Cadence (Genus/Innovus/Tempus/Jasper) EDA tools.
Practical ML experience (PyTorch/JAX/scikit-learn) and MLOps basics (feature/log pipelines, experiment tracking).
Data engineering for EDA: metrics schemas, results warehousing (PostgreSQL/BigQuery), dashboarding (Grafana), and anomaly detection.
Cloud HPC (AWS/GCP/Azure) for bursty EDA workloads; cost and license optimization.
Power intent and low-power methodology (UPF/CPF), multi-corner multi-mode closure experience.
Prior success introducing new methodology across multiple projects/teams.

Attributes of a Groqstar:

Humility - Egos are checked at the door
Collaborative & Team Savvy - We make up the smartest person in the room, together
Growth & Giver Mindset - Learn it all versus know it all, we share knowledge generously
Curious & Innovative - Take a creative approach to projects, problems, and design
Passion, Grit, & Boldness - no limit thinking, fueling informed risk taking

If this sounds like you, we’d love to hear from you!

Why join Groq? You will leave your fingerprint on civilization. AI will change humanity, forever, and Groq’s LPUs will be what powers AI. The industrial revolution began in France and Italy, but England won. England won because they had the cheapest coal. We’re transitioning from an energy society to an intelligence society, and that society is going to run on LLM tokens. In that world, Groq has the cheapest tokens. Since we will be powering AI from an early stage, you will have an impact on civilization.

Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $327,000 -$363,000, determined by your location, skills, qualifications, experience and internal benchmarks. This range is specific to roles in the United States, compensation for candidates outside the USA will be dependent on the local market.

Groq is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and applicants. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex (including gender identity, sexual orientation, and pregnancy), age, disability, genetic information, protected veteran status, or any other characteristic protected by applicable law.

Groq complies with all applicable federal, state, and local laws governing nondiscrimination in employment. We do not tolerate discrimination or harassment based on any protected characteristic.

Groq is committed to working with and providing reasonable accommodations to qualified individuals with physical or mental disabilities. If you require a reasonable accommodation to complete an application or to participate in the hiring process, please contact us at talent@groq.com. This contact is for accommodation requests only, which will be considered on a case-by-case basis.

All offers of employment are contingent upon verification of the applicant’s identity and employment authorization in accordance with federal law.

Groq encourages people with criminal record histories to apply for employment, and values diverse experiences, including prior contact with the criminal legal system. To that end, Groq welcomes such applicants in accordance with the California Fair Chance Act, Los Angeles City Fair Chance Act Ordinance, Los Angeles County Fair Chance Act Ordinance, and San Francisco Fair Chance Act Ordinance. Philadelphia applicants can review information pertaining to Philadelphia’s Fair Criminal Record Screening Standards Ordinance here: https://www.phila.gov/documents/fair-chance-hiring-law-poster.

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