Groq delivers fast, efficient AI inference. Our LPU-based system powers GroqCloud™, giving businesses and developers the speed and scale they need. From our Bay Area roots to our growing global presence, we are on a mission to make high performance AI compute more accessible and affordable. When real-time AI is within reach, anything is possible. Build fast.

Principal ASIC Design Verification Engineer

At Groq, we radically simplify computations to accelerate workloads in artificial intelligence, machine learning, and high-performance computing.

Why join Groq? You want to be a part of something groundbreaking, where every day you can see the impact of your work on Groq’s technology and customer solutions. As a Groqstar, you will join a talent-rich group of problem solvers and doers; in a culture that focuses on team, growth, innovation, and creativity. Simply put, at Groq, we defy gravity.

We are changing as the world changes and have evolved to a remote first company. Some roles may require being located near our primary sites, which will be indicated in the job description. We offer a competitive salary & benefits package, numerous quality-of-life perks such as a home office stipend, flexible learning allowance, optional professional coaching and a schedule of fun team activities.

Are you ready to join our crew and help us reimagine machine learning and AI at scale?

If so, we look forward to connecting with you!

About this role:

Groq is a machine learning systems company building easy-to-use solutions for accelerating artificial intelligence workloads. Our work spans hardware, software, and machine learning technology. We are seeking an exceptional Design Verification Engineer who is interested to join our Hardware team. You will work closely with internal interdisciplinary teams to drive key aspects of ASIC verification. This is a dynamic fast-paced environment requiring hands-on involvement. You must be responsive, flexible and able to succeed within an open collaborative peer environment.

Responsibilities & opportunities in this role:

Verify hardware features of Language Process Unit (LPU).
Collaborate within the Hardware Team to design and verify features on LPU chips in simulation, emulation and silicon.
Develop and implement advanced verification environments and methodologies for complex ASIC designs.
Implement and optimize automated verification flows to improve productivity and efficiency.
Utilize formal verification techniques to rigorously verify critical design properties and ensure compliance with specifications.
Stay updated on the latest trends and advancements in ASIC design verification and incorporate innovative techniques into the verification process.
Support silicon bring-up and debug.
Be a productivity multiplier. Contribute to identifying and adopting engineering best practices within the verification team and interactions with cross-functional teams at Groq.
Innovate. Contribute to developing future verification strategies for validating future accelerator chips and hardware architectures for ML workloads.

Ideal candidates have/are:

Ability to build strong cross-functional team relationships
Good written and oral communication skills; strong technical documentation skills
Highly self-motivated and directed; self-confidence and self-starter
Keen attention to detail
Proven analytical and problem-solving abilities
Ability to effectively prioritize and execute tasks in a high-pressure environment
Experience working in a team-oriented, collaborative environment

Qualifications for this role:

At minimum:

BS degree in electrical engineering, or related fields, or equivalent practical experience; advance degrees (MS or PhD) is a plus
15+ years design verification experience of building test benches environments and design verification processes

Highly valued, not required:

Excellent verbal and written communication skills to clearly communicate concepts in written and verbal form to stakeholders.
Experience in leading verification efforts for ASIC tape-outs
Experience with building block and SOC testbench development
Good familiarity with SystemVerilog and UVM
Good familiarity with randomly constrained testing methodologies.
Good familiarity with C/C++ reference models
Good familiarity with power verification strategies and UPF
Good familiarity with netlist simulation
Good familiarity with DFT verification
Good familiarity with formal verification flow and tools
Experiences in FPGA/Emulator hardware prototyping
Experience in Python and/or Perl scripting
Knowledge of ASIC design flow
Knowledge of applying machine learning to ASIC verification flow
Knowledge of silicon bring-up, debug, and manufacturing ATE support
Proven track record of delivering bug-free silicon

Attributes of a Groqstar:

Humility - Egos are checked at the door
Collaborative and Team Savvy - We make up the smartest person in the room together
Growth and Giver Mindset - Learn it all versus know it all, we share knowledge generously
Curious and Innovative - Take a creative approach to projects, problems, and design
Passion, grit, and boldness - no limit thinking; fueling informed risk taking

Compensation: At Groq, a competitive base salary is part of our comprehensive compensation package, which includes equity and benefits. For this role, the base salary range is $375,500 to $441,800, determined by your location, skills, qualifications, experience and internal benchmarks. This range is specific to roles in the United States, compensation for candidates outside the USA will be dependent on the local market.

US Job Postings

This position may require access to technology and/or information subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). To comply with these requirements, candidates for this role must meet certain citizenship or residency criteria. Specifically, they must qualify as U.S. Persons for export control purposes (i.e., U.S. citizen, U.S. lawful permanent resident (Green Card holder), or a protected individual under 8 U.S.C. § 1324b(a)(3) such as a refugee or asylee), or otherwise be eligible for an applicable export license.

Groq is an Equal Opportunity Employer. We are committed to creating an inclusive environment for all employees and applicants. All qualified applicants will receive consideration for employment without regard to race, color, religion, national origin, sex (including gender identity, sexual orientation, and pregnancy), age, disability, genetic information, protected veteran status, or any other characteristic protected by applicable law.

Groq complies with all applicable federal, state, and local laws governing nondiscrimination in employment. We do not tolerate discrimination or harassment based on any protected characteristic.

Groq is committed to working with and providing reasonable accommodations to qualified individuals with physical or mental disabilities. If you require a reasonable accommodation to complete an application or to participate in the hiring process, please contact us at talent@groq.com. This contact is for accommodation requests only, which will be considered on a case-by-case basis.

All offers of employment are contingent upon verification of the applicant’s identity and employment authorization in accordance with federal law.

Groq encourages people with criminal record histories to apply for employment, and values diverse experiences, including prior contact with the criminal legal system. To that end, Groq welcomes such applicants in accordance with the California Fair Chance Act, Los Angeles City Fair Chance Act Ordinance, Los Angeles County Fair Chance Act Ordinance, and San Francisco Fair Chance Act Ordinance. Philadelphia applicants can review information pertaining to Philadelphia’s Fair Criminal Record Screening Standards Ordinance here: https://www.phila.gov/documents/fair-chance-hiring-law-poster.

Req ID: R723

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